Commit Graph

  • 767e8f08e0 CDROM: Move pregap handling to image class Connor McLaughlin 2019-09-26 00:15:06 +1000
  • ba67f69c2a GTE: Implement NCCS/NCCT/NCDT/DPCS Connor McLaughlin 2019-09-25 20:24:50 +1000
  • b9b286e93d GPU: Fix shader compile error on Intel Connor McLaughlin 2019-09-25 20:24:19 +1000
  • c18597c3bf GTE: Implement unverified MVMVA Connor McLaughlin 2019-09-25 15:58:33 +1000
  • 3df7b22c37 GTE: Fix NCDS Connor McLaughlin 2019-09-25 15:40:08 +1000
  • 607cd4d3e4 CDROM: Stub out Setfilter Connor McLaughlin 2019-09-25 00:41:09 +1000
  • 9359d0778e Clean up memory access handlers, reduce template specializations Connor McLaughlin 2019-09-25 00:36:24 +1000
  • 4aca52cdf4 CPU: Silence some debug spam Connor McLaughlin 2019-09-24 23:56:18 +1000
  • 6aa36c2ead SPU: Hook up DMA reads/writes to RAM Connor McLaughlin 2019-09-24 23:55:57 +1000
  • 575a3b36f5 CDROM: Store the image path/current lba as part of the save state Connor McLaughlin 2019-09-24 23:55:22 +1000
  • 1276241622 SPU: Create stub needed for DMA to work Connor McLaughlin 2019-09-24 23:44:38 +1000
  • 7a413b4031 CDROM: Proper handling of request register Connor McLaughlin 2019-09-24 21:39:38 +1000
  • 4bb8fb211d DMA: Delay transfer/interrupt Connor McLaughlin 2019-09-24 21:38:58 +1000
  • 4cc83e2228 DMA: Implement interrupts Connor McLaughlin 2019-09-24 19:43:10 +1000
  • db777fdabb CDROM: Various fixes Connor McLaughlin 2019-09-24 01:33:18 +1000
  • 1f13c4ad2c Pad: Fix long transmit delay breaking other things Connor McLaughlin 2019-09-24 01:31:17 +1000
  • d65c9b3592 CDROM: Read timing and demute command, seek on ReadN Connor McLaughlin 2019-09-23 23:31:51 +1000
  • 20f14688ca System: Support loading expansion ROMs Connor McLaughlin 2019-09-23 01:28:00 +1000
  • 5d1c12c9ad Pad: Fix timing issues w/ BIOS Connor McLaughlin 2019-09-23 01:25:58 +1000
  • 734d1a7ee1 InterruptController: Masked interrupts are still set in the status register Connor McLaughlin 2019-09-23 01:24:36 +1000
  • fbd7fcec48 GTE: Implement NCDS (but incorrectly) Connor McLaughlin 2019-09-22 21:41:11 +1000
  • f2d62fcce0 CDROM: Hack timings to get further with booting Connor McLaughlin 2019-09-22 21:40:44 +1000
  • c772047715 GTE: Add AVSZ3/AVSZ4 Connor McLaughlin 2019-09-22 20:38:11 +1000
  • 005b06ae0c GTE: More implementation work, Reg+NCLIP+STR tests passing Connor McLaughlin 2019-09-22 17:33:11 +1000
  • 3fb08a72a4 CDROM: Hack around missing pregap in images Connor McLaughlin 2019-09-22 02:32:45 +1000
  • 948ac50020 CPU: Refactoring, implement LWC/SWC Connor McLaughlin 2019-09-22 02:06:47 +1000
  • 2875a22987 CDROM: Reads appear to be functioning Connor McLaughlin 2019-09-22 01:12:16 +1000
  • c988af453c Refactor timing to allow sync/updates in the middle of a slice Connor McLaughlin 2019-09-20 23:59:48 +1000
  • ad316162f3 Basic timer implementation Connor McLaughlin 2019-09-20 23:40:19 +1000
  • ad652c47ed Basic CD image loading Connor McLaughlin 2019-09-20 20:14:00 +1000
  • 53e755aa68 Pad: Save state support Connor McLaughlin 2019-09-20 19:21:45 +1000
  • 8cd75a4937 PAD: Basic support for digital controllers Connor McLaughlin 2019-09-20 16:47:41 +1000
  • d84bffead1 GPU: Implement transparency mode Connor McLaughlin 2019-09-19 00:55:06 +1000
  • 23ef1cafbd GPU: Force 16-bit precision when filling VRAM, clear mask bit Connor McLaughlin 2019-09-18 15:54:57 +1000
  • d8150c996b GPU: Support dumping copies out to file Connor McLaughlin 2019-09-18 15:43:25 +1000
  • e40ac7cee1 dep: Add stb_image_write Connor McLaughlin 2019-09-18 15:36:22 +1000
  • 4d624946d6 GPU: Texpage attribute can change texture mode too Connor McLaughlin 2019-09-18 15:24:29 +1000
  • 4d4ab898c0 GPU: Flush rendering before VRAM->VRAM copies Connor McLaughlin 2019-09-18 15:15:03 +1000
  • 2c07db6dd5 GPU: Flush rendering before VRAM reads Connor McLaughlin 2019-09-18 15:14:31 +1000
  • 4d38213f23 GPU: Implement VRAM-to-VRAM copies Connor McLaughlin 2019-09-18 00:58:30 +1000
  • ff83f15abe dep: Add missing file Connor McLaughlin 2019-09-18 00:30:26 +1000
  • 0a8bce8936 GPU: Hook up vblank interrupt Connor McLaughlin 2019-09-18 00:22:41 +1000
  • a84b3d7a2b CPU: Fix interrupts in branch delay slots messing up PC Connor McLaughlin 2019-09-18 00:22:10 +1000
  • 4025d6e4a6 GTE: Stub and register read/write function Connor McLaughlin 2019-09-17 23:35:17 +1000
  • 6df8d42480 CDROM: Add missing fields to save state Connor McLaughlin 2019-09-17 23:04:00 +1000
  • e3c6035152 CDROM: Implement get version and getstat commands Connor McLaughlin 2019-09-17 22:18:58 +1000
  • b951f27381 CDROM: Stub implementation Connor McLaughlin 2019-09-17 19:22:39 +1000
  • a0e7dff37c common: Add a FIFOQueue helper class Connor McLaughlin 2019-09-17 19:22:23 +1000
  • 2128a2984b Add interrupt controller emulation Connor McLaughlin 2019-09-17 16:26:00 +1000
  • c615e007c0 GPU: Serialization for CRTC state Connor McLaughlin 2019-09-17 14:40:23 +1000
  • f47688b61f System: Basic timings for GPU scanout Connor McLaughlin 2019-09-17 14:25:25 +1000
  • 9475c281bd Build: Set /MP on projects which are missing it Connor McLaughlin 2019-09-17 14:25:17 +1000
  • 540f282213 CPU: Fix incorrect exception vector for break Connor McLaughlin 2019-09-15 12:43:54 +1000
  • 5babc076f5 Bitfield: Fix incorrect shift in operator<<= Connor McLaughlin 2019-09-15 12:42:43 +1000
  • d58dbe04c0 CPU: Fix load delay register reads for same register in delay slot Connor McLaughlin 2019-09-15 12:16:51 +1000
  • 1bb794dd39 GPU: Use max vertex count based on buffer size Connor McLaughlin 2019-09-15 01:18:58 +1000
  • a58b687352 GPU: Cap batch sizes at 1024 vertices, flush if exceeded Connor McLaughlin 2019-09-15 01:13:23 +1000
  • 4ca3b4b570 CPU: Fix alignment exception on register indirect branch Connor McLaughlin 2019-09-15 01:13:11 +1000
  • bea727bbe4 CPU: Fix BGEZAL with rs == ra Connor McLaughlin 2019-09-15 01:02:35 +1000
  • 273f010d17 GPU: Use degenerate triangles to split strips and batch them Connor McLaughlin 2019-09-15 00:17:43 +1000
  • 1c8e326624 GPU: Fix off-by-one in rectangle rendering Connor McLaughlin 2019-09-14 23:50:34 +1000
  • 77b15d156d System: Periodically flush GPU Connor McLaughlin 2019-09-14 23:49:55 +1000
  • 03bd135060 SDL: Make GL debug output less noisy in Release Connor McLaughlin 2019-09-14 23:49:21 +1000
  • b5d51f47cd GPU: Use texel fetch for creating page textures Connor McLaughlin 2019-09-14 23:18:39 +1000
  • 19d9322e67 GPU: Fix texture coordinates when rendering paletted textures Connor McLaughlin 2019-09-14 22:47:20 +1000
  • e40393fec4 GPU: Use scissor test for drawing area Connor McLaughlin 2019-09-14 21:54:58 +1000
  • 3d6b8e485e Interface: Support loading filenames on command line Connor McLaughlin 2019-09-14 21:54:46 +1000
  • 363d62e5c1 GPU: Various HW renderer fixes Connor McLaughlin 2019-09-14 21:34:55 +1000
  • d94d608ad7 GPU: Implment actual data copy of VRAM->CPU readbacks Connor McLaughlin 2019-09-14 20:48:15 +1000
  • f6ef3f7ba6 GPU: Saving/loading of VRAM Connor McLaughlin 2019-09-14 20:45:26 +1000
  • 2560efbebd Save state support Connor McLaughlin 2019-09-14 20:28:47 +1000
  • 851ef67814 GPU: Implement fill VRAM command Connor McLaughlin 2019-09-14 16:43:39 +1000
  • 46870c6a7a GPU: Implement basic rectangle rendering Connor McLaughlin 2019-09-14 16:27:24 +1000
  • f47d44c151 CPU: Implement break instruction Connor McLaughlin 2019-09-14 14:41:41 +1000
  • 32a36ef1bc CPU: Implement alignment (memory) exception Connor McLaughlin 2019-09-14 14:29:23 +1000
  • 0726095f00 CPU: Implement fixed dcache/scratchpad Connor McLaughlin 2019-09-14 13:52:57 +1000
  • ced3038e73 CPU: Implement sub instruction Connor McLaughlin 2019-09-14 13:39:36 +1000
  • 1afa02d475 CPU: Fix overflowed register written back in add instruction Connor McLaughlin 2019-09-14 13:33:29 +1000
  • 459db392e7 CPU: Add missing cop0 register reads Connor McLaughlin 2019-09-14 13:31:44 +1000
  • 9f36384752 System: Support sideloading EXE files via BIOS patch Connor McLaughlin 2019-09-14 13:22:05 +1000
  • ae43cc838b GPU: Partially implemented texture support Connor McLaughlin 2019-09-14 02:07:31 +1000
  • cfe361c1a6 GPU: Basic/hacky CPU->VRAM transfers Connor McLaughlin 2019-09-13 01:10:08 +1000
  • 52b619facc DMA: Implement block transfers Connor McLaughlin 2019-09-13 01:09:44 +1000
  • aea7a18ac2 GPU: More work on OpenGL renderer Connor McLaughlin 2019-09-13 00:18:13 +1000
  • 4706a906d5 GPU: Base work for hardware renderer Connor McLaughlin 2019-09-12 12:53:04 +1000
  • c0853de6a6 GPU: Partial render polygon command processing Connor McLaughlin 2019-09-11 16:04:31 +1000
  • 162f94337e DMA: Implement linked list mode Connor McLaughlin 2019-09-11 14:59:41 +1000
  • 27913cd20a Partial implementation of DMA controller and GPU stubs Connor McLaughlin 2019-09-11 14:01:19 +1000
  • 2149ab4d69 Initial commit Connor McLaughlin 2019-09-09 17:01:26 +1000